תיאור תפקיד:
Be part of a fast-paced VLSI/FPGA team, which is developing unique video solution chipsets
· Implement the video pre/post-processing algorithms using FPGAs tools and procedures
· Define and coordinate interfaces within the system
· Define test procedures for overall FPGA Design
· Perform system on-board validation to ensure efficiency, reliability and compatibility
· Take on troubleshooting and debugging processes
דרישות:
Qualified candidates must have
· Electrical Engineering Science degree (B.Sc.)
· At least 5 years’ hands-on experience with FPGA design
· Knowledge in SystemVerilog RTL coding
· Familiar with scripts languages – Perl / Bash / Python / TCL
· High motivation, be self-driven and be able to work as a Team player and also perform independent tasks
· Excellent written and oral communication skills
Advantage to applicants with
· Familiar with FPGA tools and flows (Quartus or Vivado)
· Familiar with ASIC frontend & backend development and flows
· Familiar with verification methods as UVM
· Programming skills (C-language)
· Experience in implementation of the video processing algorithms
· Strong on-board debugging skills
היקף משרה:
משרה מלאה
קוד משרה:
5326
אזור:
מרכז - תל אביב, פתח תקווה, רמת גן וגבעתיים, בקעת אונו וגבעת שמואל, חולון ובת-ים, מודיעין, שוהם
שרון - חדרה וזכרון יעקב, נתניה ועמק חפר, רעננה, כפר סבא והוד השרון, ראש העין, הרצליה ורמת השרון
השפלה - ראשון לציון ונס- ציונה, רמלה לוד, רחובות, יבנה
|
תיאור תפקיד:
You’ll be developing algorithms for our systems with focus on the fields of digital communication, signal processing and video compression, for a new exciting, top notch technology which will be used for projects in several vertical markets as medical , Industrial , cinematography, video broadcasting.
Exploration and adaptation of HEVC and other new video compression methods – for low and ultra-low latency solutions while keeping the maximum video quality and adapting the bit rate to the variable channel conditions.
Exploration and development of OFDM and MIMO based technologies similar to the WiFi 802.11 family.
דרישות:
Qualified candidates must have
• MSc in electrical engineering, highly capable engineers with BSc degree will also be considered.
• A minimum of 5 years as an algorithm engineer (or equivalent experience in IDF technological teams)
• Good understanding in at least one of the following (An advantage for both):
1. OFDM and MIMO technologies
2. Video compression such as H.265.
• Fluency in Matlab coding.
• Good system understanding.
• Team player.
• Fast and self-learning capabilities.
Advantage to applicants with
• Programing capabilities – Python, C
• Experience with Matlab and Fixed point representation for ASIC/FPGA development
• Hands-on, familiar with lab equipment.
היקף משרה:
משרה מלאה
קוד משרה:
5298
אזור:
מרכז - תל אביב, פתח תקווה, רמת גן וגבעתיים, בקעת אונו וגבעת שמואל, חולון ובת-ים, מודיעין, שוהם
שרון - חדרה וזכרון יעקב, נתניה ועמק חפר, רעננה, כפר סבא והוד השרון, ראש העין, הרצליה ורמת השרון
השפלה - ראשון לציון ונס- ציונה, רמלה לוד, רחובות, יבנה
|